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SIGMOD Keynote Talk 2

Fun with Hardware Transactional Memory

Maurice Herlihy (Brown University)


Leading hardware vendors such as Intel and IBM are releasing a new generation of processor architectures that provide hardware transactional memory (HTM), a synchronization mechanisms for fast in-memory transactions. This talk will argue that HTM is not just a faster way of doing the same old latches and monitors. Instead, it could bring about a fundamental positive change in the way we program multicores (and eventually perhaps even databases) by allowing a fundamental rethinking of basic synchronization structures such as locks, memory management, and a range of concurrent data structures.


Maurice Herlihy has an A.B. in Mathematics from Harvard University, and a Ph.D. in Computer Science from M.I.T. He has served on the faculty of Carnegie Mellon University, on the staff of DEC Cambridge Research Lab, and is currently a professor in the Computer Science Department at Brown University. He is the recipient of the 2003 Dijkstra Prize in Distributed Computing, the 2004 Gödel Prize in theoretical computer science, the 2008 ISCA influential paper award, the 2012 Edsger W. Dijkstra Prize, and the 2013 Wallace McDowell award. He received a 2012 Fulbright Distinguished Chair in the Natural Sciences and Engineering Lecturing Fellowship, and he is fellow of the ACM and a member of the National Academy of Engineering.

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